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Hardware Engineer, FPGA
Contract type
Ongoing
Work mode
Remote · London
Experience
3 years
Job description
FPGA Design Engineer at an applied AI company, owning the bridge between RTL and physical silicon: bringing physics-inspired ASIC designs to life on FPGA platforms for pre-silicon validation and early software development, and building test infrastructure for post-silicon bring-up and characterization.
At a glance
- Work mode
- Remote · London
- Languages
- English
What you'll do
- Lead the selection, procurement, and bring-up of FPGA prototyping platforms (e.g., HAPS, VCU118/VPK180-class boards, or custom hardware) for pre-silicon RTL validation and software development
- Adapt and implement complex ASIC RTL onto FPGA targets, including multi-clock-domain architectures, CDC bridges, and timing closure on dense designs
- Integrate in-house designs with third-party and vendor IP; serve as the expert on the AMD/Xilinx ecosystem (Vivado IP Integrator, transceivers, memory controllers)
- Design, implement, and validate high-speed I/O with a focus on PCIe
- Build FPGA-based "tester" designs for silicon bring-up, device characterization, and automated test environments
- Develop the software layer around the hardware: Python/C++ hardware abstraction, register-map generation, and automated build and regression flows
- Root-cause complex timing and functional issues in real time using ILA/Vivado Analyzer, oscilloscopes, logic analyzers, and BER/eye-diagram characterization of high-speed links
What we're looking for
- Proven industry experience taking FPGA designs from RTL through timing closure to validated hardware, ideally in an ASIC prototyping, emulation, or high-growth hardware environment
- Expert-level SystemVerilog and/or VHDL for synthesis, with deep proficiency in Xilinx Vivado (synthesis, place & route, timing closure, IP catalog)
- Hands-on experience implementing and debugging PCIe, plus AXI/AHB, SPI, UART, JTAG, and other common interfaces
- Strong Python for automation, test, and build tooling
- Strong board-level bring-up and lab debugging skills on real hardware
- Startup mindset: work independently, pivot quickly, and run at ambiguous problems that span hardware, software, and physics
Nice to have
- Verification frameworks like Cocotb or UVM
- Experience deploying ML models to FPGAs (hls4ml, FINN, or custom NN-to-RTL flows), or building real-time, sub-microsecond signal processing pipelines
- Mixed-signal ASIC exposure: digital front-ends, ADC/DAC interfaces, or analog compute
- SERDES tuning and signal integrity fundamentals
- CI/CD for hardware (GitLab CI, Docker-based build and test)
Apply
About Normal Computing
Build with Us
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions.
Key facts
- Applied AI / semiconductor hardware and software
- Works as one team across New York City, Silicon Valley (Mountain View), and London
- Builds foundational hardware and software for the semiconductor industry, critical AI infrastructure, and broader systems
- Partners with the world's most advanced institutions
What they value
- Diversity